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Ask HN: How to turn off x86 Pipelining
9 points by vegetablepotpie on June 8, 2024 | hide | past | favorite | 11 comments
Product Owner wants to reduce work-in-progress (WIP). After a long conversation with a micro architecture guy, to make a long story short, I have a user story to turn off instruction pipelining on our production servers.

The story I have is only 1 story point so I need something that will not take more than a day to implement. So I need something that I can change to our software and nothing weird like changing BIOS settings or anything like that where I need to get IT involved.



you're being hazed, this isn't a real task. you can't globally turn off instruction pipelining on x86, but even if you could that wouldn't be 1 point. You can do some stuff in a specific program to disable pipelining, but then you have to performance test that and there's no way that's a 1 point thing. Your choice is to suffer quietly, or make so much noise (email everyone in IT giving the person's name that told you to do this, exposing them) that they regret giving you this task.

though, you haven't given enough context, so I could be totally off base. if you're working on a program and there's a particular part that you've been tasked to examine, you could put the appropriate x86 asm around that code to disable pipelining, which is an interesting idea, but that's still some heavy deep optimization work that would a lot more analysis than just "disable pipelining". they spent a lot of money to put it in CPUs for a reason.


I submit to you that there should have been a research spike of 8 to 13 points which was done first . The results of that spike would be your story and the preceding spike would have given you the implementation information. Even if the implementation is only 1 point, the documentation around why this is done would be more than 1 point. Because if you're not documenting in extreme detail on why this is done you're building tech debt because no one will remember.

The reason I say there needs to be a very detailed research spike is because this is almost always the wrong solution to whatever the underlying problem is. A 1 point story with no implementation details means this came about from some pontificating around theory without any actual a/b testing.

Sorry I don't have the answer to this specific thing other than you say it seems your entire process is broken here and you need a architect or sr engineer to push back on this. At minimum to provide implementation details but ideally to actually have the research to support it.


  as hypothetical product owner
  given i heard about the benefits of minimising WIP to improve cashflow in manufacturing processes
  and given i believe what is best in context A is also best in unrelated context B provided similar words are used
  when i heard that our production CPUs use pipelining, which is a form of WIP instructions for the processor
  then i wanted to disable it
  so that we can unlock the cash trapped in our production server CPU instruction pipelines


If you don't know how you are solving this problem, how did it get pointed as a 1 point story?

There is a definitely a process problem going on in your organization if you are here asking this question. Either you should have gotten this answer from your "long conversation with a micro architecture guy" before pointing the story, or your PO should not have said this story is ready. Or both.


I don't think this is possible. It's certainly not desirable.

The closest you might be able to come is working to disable as much of the l1/l2/l3 caches, but I don't know if youncan do that in userland.

You might be able to do OS settings to run your cpu at a very low clock rate and pretend that's similar.

Even ancient chips like the 8088 and 6502 had some pipelining.


Sounds like they just want to know what the impact is - and don’t want you to spend too long since it’s only 1 point. Just say you’re not sure it can be done easily if at all, and ask how much time they want you to spend on the task


There may be some MSRs that you can poke to read about the state of pipelining but I highly doubt it can be disabled on x86 (or any superscalar architecture, really).


It is impossible to turn off instruction pipelining.

If it were possible, it would be vastly more complicated than changing BIOS settings.


Product Owner wants to reduce work-in-progress (WIP).

What is the specific problem they are trying to solve?

What parts of the actual implementation are contributing to that problem?

Which contributing parts are less important than solving the problem?

Or to put it another way, turning off x86 pipelining is probably an X creating an XY problem.

Good luck.


No offence, but I have trouble imaging a profitable company where this scenario has taken place. Very weird question and context.


Not all companies are profitable :)




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