Theoretically, if you can share memory between cores of different architectures and are careful to compile everything so endianness is the same and padding lines up, shared state means you could hand control over to the other core.
Realistically, I bet this is more like the PS1 chip in the PS2, just on the same die.
This is basically the use case for the Programmable Real Time units in the AM3359. You write bare metal code to run on those processors and then use shared memory to communicate with host processes running in Linux on the application processor. The PRU lets you control peripherals without the timing jitter from a non-realtime OS like Linux.
Theoretically, if you can share memory between cores of different architectures and are careful to compile everything so endianness is the same and padding lines up, shared state means you could hand control over to the other core.
Realistically, I bet this is more like the PS1 chip in the PS2, just on the same die.